Post by kolton0 on Apr 10, 2013 16:57:33 GMT 1
Power system designers need to apply and remove power in a predetermined and device dependent sequence.
This can quickly become hard to manage when multiple devices with different profiles create complex relationships.
Power rail sequencing avoids the latch up conditions that many designers encountered as cmos logic began to rival ttl speeds. The typical scenario involved a signal line venturing way below the chip's ground due to fast edges creating undershoot that triggered potentially destructive fault currents. The same thing is possible when power is applied in the wrong order to multirail devices. Most often, the core requires power and time to stabilise before enabling peripherals and I/O, but this is not always the case.
Further complications arise when limiting a supply's rise time to alleviate voltage droop and to ensure that devices initialise correctly. For instance, power on reset circuitry within Actel's SmartFusion2 architecture requires Vdd to ramp at intervals of 50µs, 100µs, 1ms or 100ms. Simplifying standalone tasks, a basic power management ic (pmic) and a few passives suit virtually any analogue converter with feedback and enable pins. But system level applications – or any system that requires future proofing – will benefit from the more flexible control embedded within today's digital modular power products.
Analogue sequencers
Elementary sequencing control ics consist of comparator, delay and driver stages. When the rising input rail crosses a threshold, the chip waits for a period typically set by a capacitor before enabling the next converter in the sequence. Notionally, this low cost strategy can be cascaded indefinitely, but there is no synchronicity and the analogue elements drift with temperature. There's no provision for removing supplies sequentially at power down and any adjustment requires swapping passive components.
Greater integration yields broadly similar pmics that typically control four or eight converters and which may permit power down sequencing. Variations include devices with on chip charge pumps that enhance external n-channel mosfets. This may suggest to analogue designers there is a degree of rise time control through selecting mosfets with gate charge characteristics that slow the drive signal to create a power on ramp.
Mixed signal pmics that are programmable via the PMBus offer more facilities. Typical devices serve several analogue converters, measuring voltages and currents while controlling each output voltage via a d/a converter that servos a converter's feedback pin.
A programmable timer manages each converter's Enable input for sequencing, while soft start works by ramping d/a converter outputs. Internal eeprom stores configuration data and may log parameters as the system runs, with registers holding out of bounds thresholds that assist fault monitoring and recovery. It's often possible to synchronise multiple pmics via hardware connections.
Using these pmics allows 'dumb' analogue converters access to contemporary system environments. While this may seem appealing, it arguably has limited scope beyond consuming stocks of modular parts, while updates to in house designs are sure to alter pcb layout – the 'unseen component' – and may impact performance. Aficionados might argue the major, but unspoken, 'benefit' is to circumvent digital power conversion technology, which many perceive as difficult.
But you don't have to understand dsp in order to apply a modular digital converter successfully any more than you need to comprehend analogue control loop theory. This work has been done for you and it's possible to access the parameters that determine a digital converter's dynamic responses from a few mouse clicks.
Properly implemented digital converters operate seamlessly as standalone analogue converter replacements, but with superior efficiency, power density and electrical performance. Furthermore, digital converters are ideal for systems use, where applications from data logging to adaptive energy management showcase the power of PMBus.
This open standard power management protocol layers a command language onto SMBus hardware, a two wire serial bus for board level applications. Optional connections include the SMBALERT# interrupt line and a CONTROL signal that's an enable. A write protect input is optional, while Ericsson's proprietary design shrinks the standard's 7bit logical address to two lines.
The PMBus command language comprises common and device specific commands that provide an unprecedented level of control when used with fully capable devices. The protocols dictate that compatible devices can power up and operate without host supervision, while a 'set and forget' facility permits devices to be programmed with configuration data that's retained until reprogrammed. Extending logistical benefits that are familiar from PLD practices, it's possible to program a digital converter at many points prior to and during end equipment manufacture, as well as dynamically within a target system.
Simplifying power rail sequencing
Ericsson's 3E-series of digital point of load controllers (POLs) support four sequencing modes that fulfil any real world application. Time based sequencing is a simple strategy that hardwires the Control pin of each converter in the sequencing group to the Enable signal. When Enable goes active, each converter decrements a preset delay before its output starts to ramp.
The sum of the delay and ramp times determines the converter's position relative to other devices in the group. As for all 3E-series products, power down sequencing is available and can use different values from power up. Overall timing accuracy depends upon individual converters, but a typical ±0.25% represents negligible error in most applications.
Event based sequencing hardwires the Power-Good output signal from a converter to the Control input of the next device in the sequence. In this way, the output of one rail starts the next following a turn on delay and the order reverses at power down. A variation of this strategy substitutes the Global Communications Bus (GCB) that appears in Ericsson's second generation digital POLs to deliver the Power-Good signals, with the PMBus Sequence command configuring the order of the devices within the sequencing group.
The GCB is a single wire serial bus that links the digital controllers in compatible products to support facilities – such as fault and phase spreading – that benefit from accurate synchronisation, while improving application flexibility by replacing wiring connections with software commands.
Voltage tracking is the fourth method, where a 'tracking master' converter's voltage output connects to an analogue input pin of one or more 'tracking slaves' to serve as a reference. The slaves now mimic the power on delay and ramp rate of the master, subject to configuration options that ensure robust behaviour in circumstances such as the master's failure to meet its Power-Good threshold.
Digital workflow
Like other programmable digital components, 3E-series converters benefit from a range of evaluation hardware and software that makes their facilities accessible. For instance, an evaluation board is available that accommodates a pair of advanced intermediate bus converters and plugs into a board populated with a selection of POLs to create a mini system.
An adapter links the PMBus hardware to the Power Designer software suite to suit people simply wishing to familiarise with PMBus through to complex system design and development – the hardware is sufficiently robust to run high currents, while tools that range from PMBus tracing to generating configuration files for production use complement the software's extensive control abilities.
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